Chiplet-based architectures are rapidly transforming heterogeneous computing platforms for GenAI and LLMs, enabling modular scalability, technology heterogeneity, and high-performance integration. However, this shift introduces fundamental challenges across three critical dimensions: design, reliability, and security. Design challenges arise from the need for seamless interoperability, standardized interfaces, scalable design space exploration, and cross-layer hardware–software co-design across heterogeneous chiplet platforms. Reliability concerns encompass thermal management, power delivery, and advanced packaging techniques such as 2.5D/3D integration, all of which directly impact performance, yield, and long-term system robustness. At the same time, security becomes increasingly complex in disaggregated, multi-vendor environments, requiring new approaches to ensure trust, protect data movement, and mitigate emerging attack surfaces across chiplet boundaries. This special session brings together recent advances addressing these interconnected challenges, highlighting innovations in cross-layer design methodologies, reliability-aware system optimization, and secure architectures for heterogeneous AI systems. By unifying perspectives from academia and industry, the session aims to define a forward-looking roadmap for building scalable, reliable, and secure chiplet-based platforms tailored to the demands of GenAI and LLM workloads, spanning cloud, edge, and emerging embodied AI systems, and addressing timely challenges and opportunities central to the International Conference on Computer-Aided Design community.
