2019 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 4-7, 2019The Westin Westminster Westminster, CO

MP Associates, Inc.
TUESDAY November 05, 8:30am - 10:00am | Westminster III
Advanced Logic Locking Techniques for Hardware IP Protection
Yier Jin - Univ. of Florida
Yier Jin - Univ. of Florida
Swarup Bhunia - Univ. of Florida
The globalization of the semiconductor supply chain introduces ever-increasing security and privacy risks. Two major concerns are IP theft through reverse engineering and malicious modification of the design. The latter concern in part relies on successful reverse engineering of the design as well. Developing low overhead locking/camouflaging schemes that can resist the ever-evolving state-of-the-art attacks has been a research challenge for several years. This special session provides a comprehensive overview of the state-of-art with respect to locking/camouflaging techniques.

4D.1A Practical Application of Trust Through Technology
 Speaker: Kenneth Plaks - DARPA
 Authors: Yier Jin - Univ. of Florida
Swarup Bhunia - Univ. of Florida
Eric Breckenfeld - DARPA
Saverio Fazzari - Booz Allen Hamilton, Inc.
Kenneth Plaks - DARPA
4D.2Protecting Microelectronics IP: Issues, Needs, and Emerging Research Directions
 Speaker: Vipul J. Patel - Air Force Research Lab
4D.3SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis
 Speaker: Jeyavijayan Rajendran - Texas A&M Univ.
 Authors: Muhammad Yasin - Texas A&M Univ.
Chongzhi Zhao - Texas A&M Univ.
Jeyavijayan Rajendran - Texas A&M Univ.
4D.4Resolving the Trilemma in Logic Encryption
 Speaker: Hai Zhou - Northwestern Univ.
 Authors: Hai Zhou - Northwestern Univ.
Amin Rezaei - Northwestern Univ.
Yuanqi Shen - Northwestern Univ.