2019 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 4-7, 2019The Westin Westminster Westminster, CO

v class="event-details"> MP Associates, Inc.

WEDNESDAY November 07, 1:15pm - 3:15pm | Capri

A Journey from Physics to System Level on the Reliability Tracks
Sheldon Tan - Univ. of California, Riverside
Hidetoshi Onodera - Kyoto Univ.
Hussam Amrouch - Karlsruhe Institute of Technology
Reliability has become a significant challenge for design of current nanometer integrated circuits (ICs). Reliability degradation caused by aging effects (time-dependent degradations) and transient soft-errors (time-independent degradations) are becoming limiting constraints in emerging computing and communication platforms due to increased failure rates from the continuous transistor scaling, increasing process variations and aggressive power reductions. Reliability problems will get worse as future chips will show signs of aging much faster than the previous generations. To mitigate the increasing reliability and resiliency problems, holistic cross-layer solutions starting from physics and extending across circuit and architecture all the way up to system level are desired. This session consists of four presentations ranging from physics-based electromigration (EM) modeling analysis, Bias Temperature Instability (BTI)-aware timing analysis and optimization, random telegraph noise (RTN) modeling and characterization to soft-error verification via multi-level process simulation. The presentations will cover the most important VLSI reliability effects such as EM for interconnects and BTI, RTN for devices and system-level soft-errors and will address the intersection of physics, circuit and systems for reliability and resiliency modeling, design and optimization.

9D.1Multi-Physics-based FEM Analysis for Post-voiding Analysis of Electromigration Failure Effects
 Speaker: Sheldon Tan - Univ. of California, Riverside
 Authors: Hengyang Zhao - Univ. of California, Riverside
Sheldon Tan - Univ. of California, Riverside
9D.2Estimating and Optimizing BTI Aging Effects: From Physics to CAD
 Speaker: Hussam Amrouch - Karlsruhe Institute of Technology
 Authors: Hussam Amrouch - Karlsruhe Institute of Technology
Victor Van Santen - Karlsruhe Institute of Technology
Jörg Henkel - Karlsruhe Institute of Technology
9D.3PVT- Squared: Process, Voltage, Temperature and Time-dependent Variability in Scaled CMOS Process
 Speaker: Hidetoshi Onodera - Kyoto Univ.
 Authors: A.K.M. Mahfuzul Islam - Univ. of Tokyo
Hidetoshi Onodera - Kyoto Univ.
9D.4Performance and Accuracy in Soft-Error Resilience Evaluation using the Multi-Level Processor Simulator ETISS-ML
 Speaker: Ulf Schlichtmann - Tech. Univ. of Munich
 Authors: Daniel Müller-Gritschneder - Tech. Univ. of Munich
Uzair Sharif - Tech. Univ. of Munich
Ulf Schlichtmann - Tech. Univ. of Munich