2019 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 4-7, 2019The Westin Westminster Westminster, CO

v class="event-details"> MP Associates, Inc.

TUESDAY November 06, 1:45pm - 3:45pm | Monte Carlo
EVENT TYPE: REGULAR SESSION

SESSION 6B
Post-CMOS Technologies and Emerging Applications
Moderator:
Deliang Fan - Univ. of Central Florida
This session covers the post-CMOS technologies and the related emerging applications. The resistive memory (memristor) device is proposed as the enabling technology for main memory, routing switch in FPGA, and synaptic weight in neural network accelerators. An Ising processor with approximated parallel tempering is proposed to improve the quality of optimization solutions.

6B.1RAPID: Read Acceleration for Improved Performance and Endurance in MLC/TLC NVMs
 Speaker: Kartik Mohanram - Univ. of Pittsburgh
 Authors: Poovaiah Manavattira Palangappa - Univ. of Pittsburgh
Kartik Mohanram - Univ. of Pittsburgh
6B.2Sneak Path Free Reconfiguration of Via-Switch Crossbars Based FPGA
 Speaker: Ryutaro Doi - Osaka Univ.
 Authors: Ryutaro Doi - Osaka Univ.
Jaehoon Yu - Osaka Univ.
Masanori Hashimoto - Osaka Univ.
6B.3Mixed Size Crossbar Based RRAM CNN Accelerator with Overlapped Mapping Method
 Speaker: Zhenhua Zhu - Tsinghua Univ.
 Authors: Zhenhua Zhu - Tsinghua Univ.
Jilan Lin - Tsinghua Univ.
Ming Cheng - EE departement of tsinghua university
Lixue Xia - Tsinghua Univ.
Hanbo Sun - Tsinghua Univ.
Xiaoming Chen - Chinese Academy of Sciences
Yu Wang - Tsinghua Univ.
Huazhong Yang - Tsinghua Univ.
6B.4Enhancing the Solution Quality of Hardware Ising-Model Solver via Parallel Tempering
 Speaker: Hidenori Gyoten - Kyoto Univ.
 Authors: Hidenori Gyoten - Kyoto Univ.
Masayuki Hiromoto - Kyoto Univ.
Takashi Sato - Kyoto Univ.