2017 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 13-16, 2017Irvine Marriott Irvine, CA

MP Associates, Inc.
WEDNESDAY November 15, 1:45pm - 3:45pm | Newport & Marina
EVENT TYPE: SPECIAL SESSION
SESSION 9C
HDSLs: Domain Specific Languages for Hardware and SoC Design
Moderator:
Rainer Doemer - Univ. of California, Irvine
Organizers:
Wolfgang Ecker - Infineon Technologies
Jürgen Teich - Friedrich-Alexander-Univ. Erlangen-Nürnberg
Model Driven Architecture (MDA) is an Object Management Group (OMG) vision for the automation of software design that is almost 15 years old. Recently, a new version 2.0 was published, which takes care of the demand for an even higher level of flexibility. Companions of MDA are so called domain specific languages (DSLs). These languages differ from general purpose languages such as Java, C++ and Python as they are much smaller in terms of constructs and concepts and tailored to specific domains and to specific target hardware architectures. In the last years, some domain specific languages for hardware design (HDSLs) have been published. All these approaches have proven their benefit in industry grade designs in synthesizing RTL code and/or firmware. In this sense, also the C, C++ and SystemC subsets used by HLS tools are a kind of HDSL targeting control/data-path architectures. The remaining question is whether HDSLs can cover all design domains above RTL to establish a new layer of abstraction and automation? Is it possible to invent these languages, provide automation tools, and are they economically viable? Is there a need for convergence of HDSLs, since the existing approaches differ in underlying concepts, models and target architectures? To address these questions, this session presents prominent HDSL approaches, shows their use cases and takes a look ahead on new HDSL application areas where HDSLs can be utilized to improve design productivity and design quality.

9C.1Cyclist: Accelerating Hardware Development
 Speaker: Jonathan Bachrach - Univ. of California, Berkeley
 Authors: Jonathan Bachrach - Univ. of California, Berkeley
Albert Magyar - Univ. of California, Berkeley
Palmer Dabbelt - Univ. of California, Berkeley
Patrick Li - Univ. of California, Berkeley
Richard Lin - Univ. of California, Berkeley
Krste Asanovic - Univ. of California, Berkeley
9C.2Python based Framework for HDSLs in an Industrial Design Flow
 Speaker: Wolfgang Ecker - Infineon Technologies & Technische Univ. München
 Authors: Wolfgang Ecker - Infineon Technologies & Technische Univ. München
Keerthikumara Devarajegowda - Infineon Technologies & Technische Univ. München
Johannes Schreiner - Infineon Technologies
Rainer Findenig - DICE
9C.3Spatial - A Domain Specific Language for Programming Configurable Accelerators
 Speaker: Kunle Olukotun - Stanford Univ.
 Author: Kunle Olukotun - Stanford Univ.
9C.4Generating FPGA-based Image Processing Accelerators with HIPAcc
 Speaker: Jürgen Teich - Friedrich-Alexander-Univ. Erlangen-Nürnberg
 Authors: Oliver Reiche - Friedrich-Alexander-Univ. Erlangen-Nürnberg
M. Akif Özkan - Friedrich-Alexander-Univ. Erlangen-Nürnberg
Richard Membarth - DFKI GmbH
Jürgen Teich - Friedrich-Alexander-Univ. Erlangen-Nürnberg
Frank Hannig - Friedrich-Alexander-Univ. Erlangen-Nürnberg