2017 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 13-16, 2017Irvine Marriott Irvine, CA

MP Associates, Inc.
TUESDAY November 14, 1:45pm - 3:45pm | SSR
EVENT TYPE: SPECIAL SESSION
SESSION 6D
FPGA CAD: Emerging Challenges and Solutions
Moderator:
Sabya Das - Xilinx Inc.
Organizers:
Evangeline F.Y. Young - The Chinese University of Hong Kong
Bei Yu - The Chinese University of Hong Kong
Wei Zhang - Hong Kong Univ. of Science and Technology
Field Programmable Gate Arrays (FPGA) finds wider applications nowadays with the advancement in technology and gains increasing interests in heterogeneous computing and energy efficiency acceleration. FPGAs have evolved from simple programmable logic fabrics to replacing custom designs and processors for signal processing and other wide spreading applications. New generations of FPGA target at implementing the whole system on a single device, and various resources like LUT, flip-flop, RAM, DSP, as well as CPUs are placed at different locations of the device. The trend is bigger and faster in general. These advances in FPGA technology have posed many new challenges to the system and synthesis level design tools. FPGA tools nowadays need to handle various objectives like power, timing, routability and wire length, on top of other challenges like clock net construction, resource allocation, run time reduction, etc. This session highlights new CAD frameworks and techniques, in both front-end to back-end stages, for today’s large scale heterogeneous FPGAs.

6D.1Deep Learning Challenges and Solutions with Xilinx FPGAs
 Speaker: Elliott Delaye - Xilinx Inc.
 Authors: Elliott Delaye - Xilinx Inc.
Chaithanya Dudha - Xilinx Inc.
Ashish Sirasao - Xilinx Inc.
Sabya Das - Xilinx Inc.
6D.2FPGA Placement and Routing
 Speaker: Shih-Chun Chen - National Taiwan Univ.
 Authors: Shih-Chun Chen - National Taiwan Univ.
Yao-Wen Chang - National Taiwan Univ.
6D.3UTPlaceF 3.0: A Parallelization Framework for Modern FPGA Global Placement
 Speaker: Wuxi Li - Univ. of Texas at Austin
 Authors: Wuxi Li - Univ. of Texas at Austin
Meng Li - Univ. of Texas at Austin
Jiajun Wang - Univ. of Texas at Austin
David Z. Pan - Univ. of Texas at Austin
6D.4Clock-Aware UltraScale FPGA Placement with Machine Learning Routability Prediction
 Speaker: Chak-Wa Pui - Chinese Univ. of Hong Kong
 Authors: Chak-Wa Pui - Chinese Univ. of Hong Kong
Gengjie Chen - Chinese Univ. of Hong Kong
Yuzhe Ma - Chinese Univ. of Hong Kong
Evangeline F. Y. Young - Chinese Univ. of Hong Kong
Bei Yu - Chinese Univ. of Hong Kong
6D.5A Hybrid Approach to Cache Management in Heterogeneous CPU-FPGA Platforms
 Speaker: Liang Feng - Hong Kong Univ. of Science and Technology
 Authors: Liang Feng - Hong Kong Univ. of Science and Technology
Sharad Sinha - Nanyang Technological Univ.
Wei Zhang - Hong Kong Univ. of Science and Technology
Yun Liang - Peking Univ.