Monday | Tuesday | Wednesday | Thursday

	Registration - 7:00am - 4:00pm (Gateway Foyer) Speaker's Breakfast - 7:30am - 8:30am (Donner/Siskiyou Ballroom) AV Practice Rooms - 7:00am - 6:00pm (Chardonnay, Riesling, Zinfandel)
	Oak Ballroom	Fir Ballroom	Pine Ballroom	Cedar Ballroom
8:30 10:00	Tutorial 7 Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore	Session 8A Advance in Core Logic Synthesis	Session 8B Routing - Theory and Practice	Session 8C Power Optimization from Systems to Circuits
Coffee Break: 10:00 - 10:30am
10:30 12:30	Tutorial 7 (cont.) Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore	Session 9A Algorithms for Placement: Full House	Session 9B Analysis and Algorithms for Design and Test in 3-D and Many-Core Systems	Session 9C Advanced Analysis of Circuit/Device Reliability
Lunch: 12:30 - 1:30pm
2:00 4:00	Tutorial 8 Manufacturing, CAD and Thermal-Aware Architectures for 3-D MPSoCs	Session 10A Advanced Applications of Logic Synthesis	Session 10B Advances in Verification	Session 10C Recent Advances in Power Grid and Interconnect Analysis